企業博客
更多>>Raltron振蕩器設計優化
來源：http://www.jqhs.com.cn 作者：康比電子 2023年09月08
Raltron振蕩器設計優化
Oscillator Design Optimization Negative Resistance and Oscillator Circuit Margin
振蕩器設計最佳化負阻和振蕩器電路裕度
Negative Resistance and Oscillator Circuit Margin
負電阻和振蕩器電路裕量
CIRCUIT MODIFICATION FOR DETERMINATION OF NEGATIVE RESISTANCE “NegR”
用于確定負電阻“NegR”的電路修改
Negative Resistance/Circuit Margin is performed with a balance of good frequency match (least amount of measured frequency shift from a crystals measured accurately on a test system and then in circuit). The load capacitor values in circuit (C1 and C2) directly effect the amount of Negative Resistance and the Frequency, so this is balanced with the CL (capacitive load) of the crystal for optimum performance.
負電阻/電路裕度是在良好的頻率匹配(最少的測量頻率)的平衡下實現的 從在測試系統上精確測量然后在電路中測量的石英晶振的偏移)。電路中的負載電容值(C1和C2) 直接影響負電阻的大小和頻率，因此這與的CL(容性負載)相平衡 最佳性能的晶體。
.JPG)
Negative Resistance and Circuit Margin Calculation
負電阻和電路裕量計算
To start the calculations a good known crystal is needed; if the ESR of the crystal is not known, the values for C0 and CL of the crystal unit must be known in order to determine ESR along with the R1(RR) which is the measured Resistance at Frequency Resonance. (Formula A)
為了開始計算，需要一個已知的晶體；如果貼片晶振的ESR未知，則C0和CL的值 為了確定ESR和R1(RR ),必須知道晶體單元的頻率共振時的電阻。(公式A)
In order to determine the negative resistance a variable resistor(10 to 20 turn potentiometers for better adjustment accuracy) is added in series to the crystal unit. A 500 Ω resistor is a good value to start with. but could go up to 10 k? for MHz crystals or 1 M? for kHz crystals using.
為了確定負電阻，可變電阻器(10至20轉電位計，以便更好地調整 精度)被串聯添加到石英晶體單元。500ω電阻是一個不錯的起始值。但是對于MHz可以達到10kω 晶體或1Mω(kHz晶體使用)。
Increase the resistance of the variable resistor until oscillation stops, slowly turn it back until the oscillation just starts up again. Stop at this point.
增加可變電阻器的電阻，直到振蕩停止，慢慢將其轉回，直到振蕩再次開始。 到此為止。
Oscillator Design Optimization Negative Resistance and Oscillator Circuit Margin
振蕩器設計最佳化負阻和振蕩器電路裕度
Negative Resistance and Oscillator Circuit Margin
負電阻和振蕩器電路裕量
CIRCUIT MODIFICATION FOR DETERMINATION OF NEGATIVE RESISTANCE “NegR”
用于確定負電阻“NegR”的電路修改
Negative Resistance/Circuit Margin is performed with a balance of good frequency match (least amount of measured frequency shift from a crystals measured accurately on a test system and then in circuit). The load capacitor values in circuit (C1 and C2) directly effect the amount of Negative Resistance and the Frequency, so this is balanced with the CL (capacitive load) of the crystal for optimum performance.
負電阻/電路裕度是在良好的頻率匹配(最少的測量頻率)的平衡下實現的 從在測試系統上精確測量然后在電路中測量的石英晶振的偏移)。電路中的負載電容值(C1和C2) 直接影響負電阻的大小和頻率，因此這與的CL(容性負載)相平衡 最佳性能的晶體。
Negative Resistance and Circuit Margin Calculation
負電阻和電路裕量計算
To start the calculations a good known crystal is needed; if the ESR of the crystal is not known, the values for C0 and CL of the crystal unit must be known in order to determine ESR along with the R1(RR) which is the measured Resistance at Frequency Resonance. (Formula A)
為了開始計算，需要一個已知的晶體；如果貼片晶振的ESR未知，則C0和CL的值 為了確定ESR和R1(RR ),必須知道晶體單元的頻率共振時的電阻。(公式A)
(1) Determine ESR of crystal unit確定晶體單元的ESR：
R1 = RR = Rs of crystal unit晶體單位的Rs
C0 = shunt capacitance of crystal unit晶體單元的并聯電容
為了確定負電阻，可變電阻器(10至20轉電位計，以便更好地調整 精度)被串聯添加到石英晶體單元。500ω電阻是一個不錯的起始值。但是對于MHz可以達到10kω 晶體或1Mω(kHz晶體使用)。
Increase the resistance of the variable resistor until oscillation stops, slowly turn it back until the oscillation just starts up again. Stop at this point.
增加可變電阻器的電阻，直到振蕩停止，慢慢將其轉回，直到振蕩再次開始。 到此為止。
Take the variable resistor 'RTEST' out and measure the adjusted resistance using a resistance meter.
取出可變電阻器“RTEST ”,用電阻計測量調整后的電阻。
Add the value of 'RTEST' into the equation to determine Negative Resistance of the circuit and then calculate the Circuit Margin (CM). (Formulas B and C)
將“RTEST”的值加入等式，確定電路的負電阻，然后計算 電路裕量(厘米)。(公式B和C)
(2) Calculate Negative Resistance計算負電阻
(3) Determine Circuit Margin確定電路余量
(4) RESULT發生
RTEST = Measured value of variable resistor可變電阻器的測量值
ESRAVG = Average ESR of typical crystal lot典型晶體批次的平均ESR
Crystal Spec Parameters晶體規格參數
Recommended Steps to Increase Negative Resistance and Improve Circuit Margin
增加負電阻的建議步驟提高電路裕度
If the Negative Resistance is too low and or the crystal ESR is too high, the Circuit Margin can be too low if less than 5.0. To increase the Negative Resistance/Circuit Margin:
如果負電阻過低和/或晶振ESR過高，則小于5.0的電路裕量可能過低。 要增加負電阻/電路裕量:
For an optimally designed circuit the 'Negative Resistance' would be better than 100 ?; while the Circuit Margin would be greater than 10. A Circuit Margin between 5 to 10 would be acceptable. A Circuit Margin below 5 could have 'start-up' problems and failuresin manufacturing and in the field may occur
對于優化設計的電路,“負電阻”將優于100ω；而電路裕度將是 大于10。5到10之間的電路裕度是可以接受的。低于5的電路裕量可能有“啟動” 制造和現場可能會出現問題和故障
Crystal Spec Parameters晶體規格參數
Crystal Spec Parameters晶體規格參數
Recommended Steps to Increase Negative Resistance and Improve Circuit Margin
增加負電阻的建議步驟提高電路裕度
If the Negative Resistance is too low and or the crystal ESR is too high, the Circuit Margin can be too low if less than 5.0. To increase the Negative Resistance/Circuit Margin:
如果負電阻過低和/或晶振ESR過高，則小于5.0的電路裕量可能過低。 要增加負電阻/電路裕量:
1. Lower the value of Rx (current limiting resistor) to increase the crystal drive if this is an option.
如果可以選擇，降低Rx(限流電阻)的值以增加晶振驅動
2. Lower the values of C1 and C2 to increase Negative Resistance.
降低C1和C2的值以增加負電阻
a. A decrease in C1 and C2 capacitive value will increase the on-board frequency.
C1和C2電容值的降低將增加車載頻率
b. Using a crystal plated to a lower CL (Capacitive Load) will need smaller values of C1 and C2
for a good frequency match.
使用電鍍到較低CL(容性負載)的晶體將需要較小的C1和C2值 為了良好的頻率匹配。
3. Use a crystal with a lower ESR. Lower ESR when divided into NegR will give a higher CM.
使用ESR較低的晶體。當劃分為NegR時，較低的ESR將產生較高的CM。
4. Where possible use a different IC with ALC (Automatic Level Control) which adjusts the drive
level as needed to ensure there is enough drive and negative resistance to have a consistent
crystal signal amplitude level.
在可能的情況下，使用帶有ALC(自動水平控制)的不同IC來調節驅動 根據需要調整水平，以確保有足夠的驅動力和負阻力晶體信號振幅水平。
| 元器件詳情 | 頻率 | 頻率穩定性 | 電源電壓 | 包裝 |
| CO4310-24.576-EXT-TR | 24.576MHz | ±100ppm | 3.3V | 卷盤 |
| Raltron進口晶振 | ||||
| CO43 Series 24.576 MHz 7 x 5 mm 3.3 V ±100 ppm Surface Mount Clock Oscillator | ||||
| CO4310-25.000-EXT-TR | 25MHz | ±100ppm | 3.3V | 卷盤 |
| Raltron | ||||
| CO43 系列 3.3 V ±100 ppm -40 至 +85°C 7 x 5 mm 表面貼裝 時鐘振蕩器 | ||||
| CO4310-25.000-TR | 25MHz | ±100ppm | 3.3V | 卷盤 |
| Raltron | ||||
| CO43 系列 25 MHz ± 100 ppm 7 x 5 mm 3.3 V 表面貼裝 時鐘振蕩器 | ||||
| CO4310-29.4912-TR | 29.4912MHz | ±100ppm | 3.3V | 卷盤 |
| Raltron | ||||
| CO4 Series 29.4912 MHz 3.3 V ±100 ppm -20°C TO +70°C SMT CMOS Clock Oscillator | ||||
| CO4310-32.000-EXT-TR | 32MHz | ±100ppm | 3.3V | 卷盤 |
| Raltron | ||||
| CO4 Series 32 MHz 3.3 V ±100 ppm -40°C TO +85°C SMT CMOS Clock Oscillator | ||||
| CO4310-40.000MHZ | 40MHz | ±100ppm | 3.3V | 卷盤 |
| Raltron | ||||
| CO4 Series 40 MHz 3.3 V ±100 ppm -20°C TO +70°C SMT CMOS Clock Oscillator | ||||
| CO4310-48.000-T-TR | 48MHz | ±100ppm | 3.3V | 卷盤 |
| Raltron | ||||
| CO43 系列 48 MHz 3.3 V ±100 ppm 表面貼裝 時鐘振蕩器 | ||||
| CO4310-5.000-EXT-TR | 5MHz | ±100ppm | 3.3V | 卷盤 |
| Raltron | ||||
| CO4 Series 5 MHz 3.3 V ±100 ppm -40°C TO +85°C SMT CMOS Clock Oscillator | ||||
| CO4310-5.000-T-TR | 5MHz | ±100ppm | 3.3V | 卷盤 |
| Raltron | ||||
| CO43 系列 7 x 5 mm 5 MHz ±50 ppm -10 至 70°C 表面貼裝 時鐘振蕩器 | ||||
| CO4310-50.000-EXT-T-TR | 50MHz | ±100ppm | 3.3V | 卷盤 |
| Raltron | ||||
| CO4 Series 50 MHz 3.3 V ±100 ppm -40°C TO +85°C SMT CMOS Clock Oscillator | ||||
| CO4310-50.000-T-TR | 50MHz | ±100ppm | 3.3V | 卷盤 |
| Raltron | ||||
| CO43 系列 50 MHz 7 x 5 mm 3.3 V ±50 ppm 表面貼裝 時鐘振蕩器 | ||||
| CO4310-6.000-T-TR | 6MHz | ±100ppm | 3.3V | 剪切卷帶 |
| Raltron | ||||
| CO43 系列 6 MHz 7 x 5 mm 3.3 V ±100 ppm 表面貼裝 時鐘振蕩器 | ||||
| CO4310-8.000-EXT-T-TR | 8MHz | ±100ppm | 3.3V | 卷盤 |
| Raltron | ||||
| CO4 Series 8 MHz 3.3 V ±100 ppm -40°C TO +85°C SMT CMOS Clock Oscillator | ||||
| CO4310S-16.384-TR | 16.384MHz | ±100ppm | 3V to 3.6V | 袋裝 |
| Raltron | ||||
| CO43 Series 16.384 MHz 7 x 5 mm 3.6 V ±100 ppm SMT CMOS/TTL Clock Oscillator | ||||
| CO4310S-50.000-EXT-TR | 50MHz | ±100ppm | 3.3V | 卷盤 |
| Raltron石英晶體振蕩器 | ||||
| CO4 Series 50 MHz 3.3 V ±100 ppm -40°C TO +85°C SMT CMOS Clock Oscillator | ||||
| CO46025S-100.000-TR | 100MHz | ±25ppm | 3.3V | 卷盤 |
| Raltron | ||||
| CO46 Series 100 MHz 7 x 5 mm 3.3 V ±25 ppm Surface Mount Clock Oscillator | ||||
| CO46025S-66.670-EXT-TR | 66.67MHz | ±25ppm | 3.3V | 卷盤 |
| Raltron | ||||
| CO4 Series 66.67 MHz 3.3 V ±25 ppm -40°C TO +85°C SMT CMOS Clock Oscillator | ||||
| CO4605-100.000-EXT-T-TR | 100MHz | ±50ppm | 3.3V | 散裝 |
| Raltron | ||||
| CO46 系列 100 MHz 7 x 5 mm 3.3 V ±50 ppm 表面貼裝 時鐘振蕩器 | ||||
| CO4605-125.000-EXT-TR | 125MHz | ±50ppm | 3.3V | 卷盤 |
| Raltron | ||||
| CO46 系列 125 MHz 7 x 5 mm 3.3 V ±50 ppm 表面貼裝 時鐘振蕩器 | ||||
| CO4605-60.000M-EXT-TR | 60MHz | ±50ppm | 3.3V | 卷盤 |
| Raltron | ||||
| CO46 Series 60 MHz 7 x 5 mm 3.3 V ±50 ppm Surface Mount Clock Oscillator | ||||
| CO4605-62.500-T-TR | 62.5MHz | ±50ppm | 3.3V | 卷盤 |
| Raltron | ||||
| CO4 Series 62.5 MHz 3.3 V ±50 ppm -20°C TO +70°C SMT CMOS Clock Oscillator | ||||
| CO4605-66.000-EXT-T-TR | 66MHz | ±50ppm | 3.3V | 卷盤 |
| Raltron | ||||
| CO46 系列 66 MHz ±50 ppm 3.3 V -40 至 +85°C 表面貼裝 時鐘振蕩器 | ||||
| CO4605-66.000-T-TR | 66MHz | ±50ppm | 3.3V | 卷盤 |
| Raltron | ||||
| CO4 Series 66 MHz 3.3 V ±50 ppm -20°C TO +70°C SMT CMOS Clock Oscillator | ||||
| CO4605-80.000-EXT-TR | 80MHz | ±50ppm | 3.3V | 卷盤 |
| Raltron | ||||
| CO46 系列 80 MHz ± 50 ppm 7 x 5 mm 3.3 V 表面貼裝 時鐘振蕩器 | ||||
| CO4605S-66.600-EXT-T-TR | 66.6MHz | ±50ppm | 3.3V | 卷盤 |
| Raltron | ||||
| CO4 Series 66.6 MHz 3.3 V ±50 ppm -40°C TO +85°C SMT CMOS Clock Oscillator | ||||
| CO4610-133.33-T-TR | 133MHz | ±100ppm | 3.3V | 剪切卷帶 |
| Raltron | ||||
| CO46 系列 133.33 MHz 7 x 5 mm 3.3 V ±100 ppm 表面貼裝 時鐘振蕩器 |
正在載入評論數據...
相關資訊
- [2026-04-10]CTS新一代聲納換能器賦能水下探...
- [2026-04-10]CTS壓電解決方案筑牢精準醫療新...
- [2026-04-08]ECS低老化晶體筑牢醫療設備計時...
- [2026-04-08]ECS推出先進負載電容計算器
- [2026-04-03]TAITIEN將無人機視覺技術推向全...
- [2026-04-03]TAITIEN推出革命性X4系列微型石...
- [2026-04-01]Bliley百利BQCSA系列高溫高穩定...
- [2026-04-01]AE131系列晶振是7050貼裝的可靠...
